Codage is realized in three phases

-         Acquisition :

the analog signal is continuously sampled at the frequency Fe in a circular analog memory. The arrival of a trigger signal initiates the stopping phase of the sampling (‎II.1.a). At the end of this phase, the state of the memory is set : it then contains the last 2560 points sampled (of which 2520 are valid).

-         Numerization and storage :

after a stopping order of the acquisition, the samples stored under analog form in the MATACQ chips are rapidly (650µs) re-read and coded into digital data over 12 bits, then stored in a digital memory buffer. The acquisition is informed of the end of the coding phase either by scrutation of an internal register, or by an interruption.

-         Reading :

the memory buffer can then be re-read by the acquisition system. For an acquisition system of VME A24-D16 standard, the latter operation lasts a few ms for the full readout of a 4-channel board, which permits attaining an acquisition frequency of a few hundred Hz for the acquisition of 2500 points per channel. With a high performance A32-D32 system, one should reach 1 kHz.